What does SystemVerilog and Verilog Formatter do?

Formats SystemVerilog and Verilog source code consistently within Visual Studio Code. It is catalogued under IDEs & code editors on PulseGate.

Who is SystemVerilog and Verilog Formatter for?

SystemVerilog and Verilog Formatter is an open-source project built for hardware and FPGA developers.

What platforms does SystemVerilog and Verilog Formatter run on?

SystemVerilog and Verilog Formatter runs on the web, Windows, macOS, and Linux.

Is SystemVerilog and Verilog Formatter still active?

Unverified. SystemVerilog and Verilog Formatter has not been re-checked since it entered the index, so there is no finding either way — and only a positive finding would say otherwise.

Who develops SystemVerilog and Verilog Formatter?

SystemVerilog and Verilog Formatter is developed by Borja Penuelas.

When did SystemVerilog and Verilog Formatter launch?

SystemVerilog and Verilog Formatter first shipped in 2020.

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SystemVerilog and Verilog Formatter

Name: SystemVerilog and Verilog Formatter
Author: Borja Penuelas

visualstudio.comIDEs & code editors

A Visual Studio Code extension that formats SystemVerilog and Verilog code using Verible. It supports common HDL file extensions and integrates formatting into the editor for hardware and FPGA developers.

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Visit visualstudio.com

Overview

5 features

In the IDEs & code editors space, SystemVerilog and Verilog Formatter takes a focused approach. Formats SystemVerilog and Verilog source code consistently within Visual Studio Code. SystemVerilog and Verilog Formatter is an open-source project aimed at hardware and FPGA developers. SystemVerilog and Verilog Formatter is free to use. SystemVerilog and Verilog Formatter is available on the web, Windows, macOS, and Linux.

It is developed by Borja Penuelas, and it first shipped in 2020. Among its 5 catalogued features are systemVerilog formatting, verilog formatting, and VS Code integration.

SystemVerilog formatting
Verilog formatting
VS Code integration
Verible backend
Language extensions

Built with & integrations

Connectors

vscode

Runs on

BrowserWindowsmacOSLinux

Trust & compliance

Verified signals

HTTPSFree tierStore-verified publisher

Indexing history

What PulseGate has recorded for this listing

Indexed27 Aug · 10:05 UTC
SystemVerilog and Verilog Formatter verified against its public source
Source: PulseGate · Open

Frequently asked questions about SystemVerilog and Verilog Formatter

What does SystemVerilog and Verilog Formatter do?: Formats SystemVerilog and Verilog source code consistently within Visual Studio Code. It is catalogued under IDEs & code editors on PulseGate.
Who is SystemVerilog and Verilog Formatter for?: SystemVerilog and Verilog Formatter is an open-source project built for hardware and FPGA developers.
Is SystemVerilog and Verilog Formatter free?: Yes — SystemVerilog and Verilog Formatter is free to use.
What platforms does SystemVerilog and Verilog Formatter run on?: SystemVerilog and Verilog Formatter runs on the web, Windows, macOS, and Linux.
Is SystemVerilog and Verilog Formatter still active?: Unverified. SystemVerilog and Verilog Formatter has not been re-checked since it entered the index, so there is no finding either way — and only a positive finding would say otherwise.
Who develops SystemVerilog and Verilog Formatter?: SystemVerilog and Verilog Formatter is developed by Borja Penuelas.
When did SystemVerilog and Verilog Formatter launch?: SystemVerilog and Verilog Formatter first shipped in 2020.

At a glance

Platforms: Web
Languages: English
First seen: 27 Aug 2026
Built for: hardware and FPGA developers
Model: Open source
Solves: Formats SystemVerilog and Verilog source code consistently within Visual Studio Code.

Registered as

VS Code Marketplace: bmpenuelas.systemverilog-formatter-vscode

Developer

Borja Penuelas

Index record

Identity confidence: High · 91
Indexed: 27 Aug 2026
Lifecycle: Alive
First seen: Aug 2026
Last seen: 27 Aug 2026

Identity audit (12)

Slug: systemverilog-and-verilog-formatter-visualstudio-com
Lifecycle state recorded: 27 Aug 2026
Verification state: Indexed for public listing
Listing state: Listed: yes
Index status: Included in index
Latest evidence snapshot: 27 Aug 2026
Timeline basis: Indexed-at chronology (no inferred launch/funding milestones).
Name from: Derived from the project's own page and URL.
Category from: Assigned by a language model.
Languages from: Detected by a language model from page content.
Last updated: 27 Aug 2026
Canonical URL: https://marketplace.visualstudio.com/items?itemName=bmpenuelas.systemverilog-formatter-vscode

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