Skip to content
Back to the index

jig-dsl

PyPIInfrastructure

No liveness check has reached it yet; it is registered on GitHub and PyPI and has been in the index since 14 Oct 2026. How this is checked

jig-dsl is an open-source test language and harness for firmware running on the Renode emulator. It helps embedded developers test firmware for platforms such as Zynq and STM32 using a reusable command-line testing workflow.

Inferred · not functionally tested

Open SourceMITCLISelf-hosted
Visit PyPI

Overview

5 features

Purpose: Testing firmware on the Renode emulator without building a custom test harness.

Inferred · not functionally tested

Audience: embedded firmware developers

Inferred · not functionally tested

Functions: Unknown

Interfaces: API: unknown · MCP: unknown · CLI: indicated (inferred, not tested) · Self-hosting: indicated (inferred, not tested)

Recorded constraints: pricing: open_source · license: MIT · platforms: CLI · deployment: cli, self_hosted

Constraint provenance is unknown; confirm requirements with the publisher.

Record sources: pypi.org · github.com. These links do not verify the individual claims.

jig-dsl is a Testing & QA project. Inferred · not functionally tested: It focuses on testing firmware on the Renode emulator without building a custom test harness. Inferred · not functionally tested: It is built as an open-source project for embedded firmware developers. Basis unknown · not verified: The project is open source (MIT). Basis unknown · not verified: jig-dsl is available on the command line, and it can be self-hosted.

GNPower builds and maintains jig-dsl, and it first shipped in 2026. The project is developed in the open on GitHub with 13 commits in the last 90 days. Inferred · not functionally tested: Among its 5 catalogued features are test language, firmware testing, and renode integration.

Summary written by a language model from the project’s public pages.

Tasks: Inferred · not functionally tested

  • Test language
  • Firmware testing
  • Renode integration
  • Emulator harness
  • Embedded testing

Topics: Inferred · not functionally tested

Tags
firmware-testingrenode-emulatorembedded-systemstest-harness

JSON profile · Text profile · Access guide

Built with & integrations

Runs on
CLISelf-hosted

Trust & compliance

License
MIT
Public signals
HTTPSOpen SourceFree tierGitHubActive maintenance

Indexing history

1

What PulseGate has recorded for this listing

  1. Indexed14 Oct · 03:38 UTC
    jig-dsl seen via PyPI Bulk Enumerator
    Source: PyPI Bulk Enumerator · Open

Frequently asked questions about jig-dsl

What is jig-dsl?
Inferred · not functionally tested: Jig-dsl focuses on testing firmware on the Renode emulator without building a custom test harness. It is catalogued under Testing & QA on PulseGate.
Who is jig-dsl for?
Inferred · not functionally tested: jig-dsl is an open-source project built for embedded firmware developers.
Does jig-dsl have a free plan?
Basis unknown · not verified: Yes — jig-dsl is open source under the MIT license and free to use.
What platforms does jig-dsl run on?
Basis unknown · not verified: jig-dsl runs on the command line. It can also be self-hosted.
Is jig-dsl still active?
The GitHub repository shows 13 commits in the last 90 days.
What projects are similar to jig-dsl?
Similar projects tracked by PulseGate include Viam Coverage Report, ISC Test case runner, and IC10 Bench.Viam Coverage ReportISC Test case runnerIC10 Bench
Who makes jig-dsl?
jig-dsl is developed by GNPower.
When did jig-dsl launch?
jig-dsl first shipped in 2026.

Also in Testing & QA

Same category — not a similarity match